The present disclosure herein relates to a semiconductor, and more particularly, to a semiconductor device including a through electrode and a method for fabricating the same.
The development direction of semiconductor packages is changing in response to the current trend toward the reduction in size and weight, and the increase in speed and capacity of electronic products. Integrating a plurality of semiconductor chips into a single semiconductor device by stacking the semiconductor chips is one way in which these goals are being accomplished.
Stacked semiconductor packaging technology is an ideal way to provide these improvements because it can allow for a significant reduction in the area occupied by the semiconductor package, while increasing the memory of a device and permitting multiple functions to be performed within the semiconductor package, such as in a System In Package (SIP).
Conventional stacking methods, for instance, may change an upper structure of the semiconductor chip, such as by performing a separate re-interconnection process, or may form a through electrode on the chip. The method of forming a through electrode provides several advantages, however, including high-performance, high integration density, and a lower profile of the semiconductor product.